Method and apparatus for multi-destination communication processing in packet storage/exchange node

ABSTRACT

In a method and an apparatus for multi-destination communication processing in a packet storage/exchange node, a line control module controls transmission and reception of a message that contains either a single destination message or a multi-destination message to and from a telephone subscriber line. A file storage stores the message in accordance with delivery destination addresses, and a file control module controls writing the message received from the line control module into the file storage and reading the message from the file storage to supply the message to the line control module. At least one multi-destination message tempeorary storage area of a multi-destination message temporary storage included in a multi-destination message storing/processing module temporarily stores a multi-destination message and at least one single destination message storage area of the multi-destination message temporary storage stores individual single destination messages expanded from the multi-destination message.

BACKGROUND OF THE INVENTION

This invention relates generally to packet storage/exchange nodes andmore particularly to a multi-destination communication processing systemin a packet storage/exchange node. The invention is suitable forexcluding an abrupt increase in load on multi-destination messageexpansion processing and avoids mutual interference at message input andoutput of a subscriber circuit due to a bottleneck in node performance.

The term "terminal" is a general term indicative of packet exchangeterminals such as computers, facsimile terminals and the like. The term"node" is a general term indicative of network elements having a packetexchange function.

A prior art packet storage/exchange node is generally constructed asshown in FIG. 1. Referring to FIG. 1, a line control module 1 controlstransmission and reception of a message in the form of a packet to andfrom a telephone line such as a telephone subscriber line or telephonetrunk line 10. A file control module 2 stores a message from the linecontrol module 1 into a predetermined area of a file storage 3 and readsa message from the file storage 3 to supply the read message to the linecontrol module 1. The file storage 3 stores messages in correspondenceto individual single destination deliveries.

In designing such a packet storage/exchange node with a view of meetingan increase in load on the file control module, it has hitherto beenpractice to increase the number of file control modules involvedcorrespondingly to thereby promote the capability of the node in total.This expedient is exemplified in FIG. 2 wherein a plurality of filecontrol modules 2-1, 2-2 and 2-3 are provided.

With multi-destination message services introduced into the packetstorage/exchange node, however, the load on the file control module istheoretically increased in proportion to (n-1) when the number ofsubscriber terminals associated with the node is n and the prior artsystem faces difficulties in complying with the increasing load.Consequently, there arises a problem that a multi-destination messagefrom one of the subscribers interferes with communications in progressbetween the node and an other subscriber, causing a bottleneck in thefile control module processing.

This will be detailed with reference to FIGS. 3A-3C. As illustrated inFIG. 3A the preformance of the file control module 2 is set to be suchthat the load factor typically measures 100% when n subscribers accessthe node at a time. Under multi-destination message services,multi-destination message expansion is required to be undertaken at theentrance to the file control module 2. As will be seen from FIG. 3B onemulti-destination message for the total (n) deliveries issued from onesubscriber occupies (n-1)/1×100% of the load factor of the file controlmodule. Likewise, as illustrated in FIG. 3C, multi-destination messagesfor the total deliveries issued from n subscribers will loadn×(n-1)/n×100=(n-1)×100% of the file control module's load factor uponthe file control module 2. As a result, the node experiences, in itsfile control module, such a bottleneck as is liable to force the filecontrol module to continue occupying the CPU at an activity ratio ofabout 100%, followed by stoppage of processings of lower priority gradeor to fill up the input/output buffer to make the same inoperable. Thismeans that the node becomes overloaded instantaneously.

Reference may be made to JP-A-58-204660, for example, as a relevantreference to multi-destination communications.

SUMMARY OF THE INVENTION

This invention contemplates avoidance of a bottleneck that can occur inthe file control module of known systems when a plurality ofmulti-destination messages develop at a time in a packetstorage/exchange. Such a bottleneck might otherwise adversely affect theCPU or the input/output buffer associated with the file control moduleto seriously degrade the performance of the node or to render the nodeinoperable. It is an object of this invention to provide a method and anapparatus for multi-destination communication processing capable ofexcluding inter-circuit interference which occurs between everyavailable circuit and the node, the interference being, for example,disconnection of subscriber lines due to time-out.

To accomplish the above object, according to this invention, amulti-destination message storing/processing module has amulti-destination message temporary storage. A header in a messagereceived from a telephone subscriber line is read and analyzed at a linecontrol module. When the input message is detected to be amulti-destination message, this multi-destination message is transferredto the multi-destination message temporary storage at which it istemporarily stored and expanded into individual single destinationdelivery messages which in turn are transferred sequentially in units ofone message to a file control module, thereby releasing the file controlmodule from being loaded for multi-destination message expansion. Duringthe multi-destination message expansion, the line control module dealswith a transmission request from that telephone subscriber line byholding the request (keeping it pending) or making no response to therequest.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1 and 2 are schematic diagrams showing prior art packetstorage/exchange nodes.

FIGS. 3A to 3C illustrates problems encountered in the prior artsystems.

FIG. 4 is a block diagram schematically showing a packetstorage/exchange node according to an embodiment of the invention.

FIG. 5 is a block diagram schematically showing a multi-destinationmessage storing/processing module used in the node of FIG. 4.

FIG. 6 illustrates a format of single destination message andmulti-destination message.

FIGS. 7 to 12 illustrate, with the aid of diagrammatic representationand table, operational states and operational events inmulti-destination message branching circuit, multi-destination messagetemporary storage, file control module and subscriber circuit.

FIG. 13 is a schematic diagram showing another embodiment of amulti-destination message temporary storage shown in FIG. 5.

DETAILED DESCRIPTION

The invention will now be described by way of example with reference tothe accompanying drawings.

Referring to FIG. 4, there is illustrated a package storage/exchangenode according to an embodiment of this invention. The node comprises aline control module 1, a file control module 2, a file storage 3 and amulti-destination message storing/processing module 4. The line controlmodule 1 includes multi-destination message branching circuits 11, 12and 13 respectively connected with telephone lines 101, 102 and 103 of asubscriber circuit 10.

A message, containing either a single destination message or amulti-destination message and received in a transmission unit from, forexample, the line 101 is supplied to the multi-destination messagebranching circuit 11 included in the line control module 1. Themulti-destination message branching circuit 11 reads and detects aheader in the input message. When the input message is detected to be asingle destination message, the multi-destination message branchingcircuit 11 transfers this single destination message directly to thefile control module 2. On the other hand, when the input message is amulti-destination message, the multi-destination message branchingcircuit 11 transfers this multi-destination message to themulti-destination message storing/processing module 4 and at the sametime informs the line 101 that it is temporarily disabled for reception.Concurrently with initiation of the multi-destination message reception,the multi-destination message storing/processing module 4 sets amulti-destination message reception inhibiting level signal into each ofthe multi-destination message branching circuits 11 to 13. Thesecircuits 11 to 13 are thus held in multi-destination message receptioninhibiting conditions, except for the circuit 11 which has alreadystarted receiving the multi-destination message. In response to anothermulti-destination message the reception inhibited circuits transmit, tothe associated lines, a disconnection instruction or an affirmationwaiting response. The "disconnection instruction" is issued from theline control module to the associated line to inform the line that theline control module refuses to acknowledge the receipt ofmulti-destination messages. The "affirmation waiting response" is alsoissued from the line control module to the associated line to instructthe line to wait until an affirmative signal indicates that the linecontrol module is now ready for acknowledging the receipt ofmulti-destination messages.

After completion of the transfer of the multi-destination message to themulti-destination message storing/processing module 4, themulti-destination message branching circuit 11 to transmits adisconnection instruction or an affirmation waiting response to the line101.

Under this condition, the multi-destination storing/processing module 4temporarily stores a message in the multi-destination message andtemporarily transfers delivery destination addresses from a header inthe multi-destination message to a memory area. Thereafter it expandsthe multi-destination message into individual single destinationdelivery messages by preparing individual message headers, the number ofwhich is equal to that of individual delivery destination addresses, andadding the stored message to the individual message headers. The thusexpanded individual single destination delivery messages for alldeliveries are sequentially transferred in units of one message to thefile control module 2 through the multi-destination message branchingcircuit 11. Upon completion of the expansion and transmission of thetemporarily stored messages for all the addresses, the multi-destinationmessage storing/processing module 4 releases the multi-destinationmessage branching circuits 11 to 13 from the multi-destination messagereception inhibiting signal previously set therein.

The multi-destination message storing/processing module 4 may bematerialized readily by using, for example, microcomputer architecture.FIG. 5 illustrates a structural example of multi-destination messagestoring/processing module 4 comprising an interface 41 coupled to themulti-destination branching circuits, a central processing unit (CPU)42, a program memory (ROM) 43 and a data memory (RAM) 44 serving as themulti-destination message temporary storage. In the RAM 44, themulti-destination message is stored in a multi-destination messagetemporary storage area 441 and the stored message is divided intoindividual single destination messages (1), (2), (3), . . . (n) which inturn are stored in a single destination message storage area 442, underthe control of the CPU 42.

More particularly, when receiving a multi-destination message from oneof the multi-destination message branching circuits 11 to 13 through theinterface 41, the CPU 42 operates to temporarily store themulti-destination message in the multi-destination message temporarystorage area 441 of the RAM 44 and subsequently, to expand the storedmulti-destination message into individual single destination deliverymessages (1), (2), (3), . . . (n) the number of which is equal to thatof individual delivery addresses designated by a header in themulti-destination message and set the expanded messages (1), (2), (3), .. . (n) in the single destination message storage area 442. Thereafter,the CPU 42 operates to sequentially read the expanded individual singledestination delivery messages in units of one message and return them tothat multi-destination message branching circuit through the interface41. The CPU 42 also operates to transmit a multi-destination messagereception inhibiting level signal to each of the multi-destinationmessage branching circuits 11 to 13 when it receives themulti-destination message and to release the multi-destination messagebranching circuits 11 to 13 from the multi-destination message receptioninhibiting level signal when the transmission of all of the individualsingle destination delivery messages in the single destination messagestorage area 442 has been completed. The CPU 42 executes a series ofprocessings pursuant to a program stored in the ROM 43.

An example of a message format is illustrated in FIG. 6. The messageformat has a header of n bytes and a message of i bytes, the headerbeing detailed in FIG. 6. The header includes an ID of two bytes forindentification of the type of message such as a transmission message, aresponse message or a control message; a MODE of two bytes indicative ofthe mode of communications; a CLS of two bytes for identification of thegrade of communication class such as an express communication or anordinary communication; a receiving terminal number of two bytes foridentification of either a single destination delivery or amulti-destination delivery; a message field length of eight bytes forprescribing the length of a multi-destination address field; and amulti-destination address field of 256 bytes.

FIG. 7 shows a diagram useful to explain the operational state of themulti-destination message branching circuit as viewed from thesubscriber. Table I describes the events in the operation.

FIG. 8 shows a diagram useful to explain the operational state of themulti-destination message temporary storage as viewed from themulti-destination message branching circuit. Table II describes eventsin the operation according to FIG. 8.

FIG. 9 shows a diagram for explaining the operational state of themulti-destination message branching circuit as viewed from themulti-destination message temporary storage. Table III is an event tablewhich corresponds to FIG. 9.

FIG. 10 shows a diagram for explaining the operational state of the filecontrol module as viewed from the multi-destination message branchingcircuit. Table IV is an event table which corresponds to FIG. 10.

FIG. 11 shows a diagram for explaining the operational state of themulti-destination message branching circuit as viewed from the filecontrol module. Table V is an event table corresponding to FIG. 11.

FIG. 12 shows a diagram for explaining the operational state of thesubscriber circuit as viewed from the multi-destination messagebranching circuit. Table VI is an event table corresponding to FIG. 12.

Table I describes state transition events in the muilti-destinationmessage branching circuit as viewed from the subscriber circuit as shownin FIG. 7 and is as follows.

    ______________________________________                                                             Event Originator                                         Event                      Sub-    Other than                                 number Events              scriber subscriber                                 ______________________________________                                        7-1    Setting of a multi-destination                                                                            O                                                 message acknowledgement rejec-                                                tion (disconnection) directed                                                 from the multi-destination                                                    message storing/processing                                                    module to the multi-destina-                                                  tion message branching                                                        circuit is released.                                                   7-2    A multi-destination message O                                                 acknowledgement rejection                                                     (disconnection) directed from                                                 the multi-destination message                                                 storing/processing module to                                                  the multi-destination message                                                 branching circuit is set.                                              7-3    A single destination message                                                                      O                                                         is received from the sub-                                                     scriber circuit.                                                       7-4    A multi-destination message                                                                       O                                                         is received from the sub-                                                     scriber circuit.                                                       7-5    Setting of a multi-destina- O                                                 tion message acknowledgement                                                  rejection (disconnection)                                                     directed from the multi-                                                      destination message storing/                                                  processing module to the                                                      multi-destination message                                                     branching circuit is                                                          released.                                                              ______________________________________                                    

Table II describes state transition events in the multi-destinationmessage temporary storage as viewed from the multi-destination messagebranching circuit as shown in FIG. 8 and is as follows.

    ______________________________________                                                            Event Originator                                          Event                     Branch-  Other than                                 num-                      ing      branching                                  ber   Events              circuit  circuit                                    ______________________________________                                        8-1   The multi-destination message                                                                     O                                                         temporary storage starts                                                      receiving a multi-destination                                                 message from the multi-desti-                                                 nation message branching                                                      circuit.                                                                8-2   Temporary storage of the     O                                                multi-destination message                                                     is completed.                                                           8-3   Setting of a multi-destination                                                                             O                                                message acknowledgement rejec-                                                tion (disconnection) directed                                                 from the multi-destination                                                    message storing/processing                                                    module to the multi-destina-                                                  tion message branching                                                        circuit is released.                                                    ______________________________________                                    

Table III describes state transition events in the multi-destinationmessage branching circuit as viewed from the multi-destination messagetemporary storage as shown in FIG. 9 and is as follows.

    ______________________________________                                                           Event Originator                                           Event                              Other than                                 Num-                     Temporary temporary                                  ber   Events             storage   storage                                    ______________________________________                                        9-1   The multi-destination message                                                                              O                                                branching circuit receives a                                                  multi-destination message                                                     from the subscriber circuit.                                            9-2   A multi-destination message                                                                      O                                                          acknowledgement rejection                                                     (disconnection) directed from                                                 the multi-destination message                                                 storing/processing module to                                                  the multi-destination message                                                 branching circuit is set.                                               9-3   Setting of a multi-destina-                                                   tion message acknowledgement                                                  rejection (disconnection)                                                     directed from the multi-                                                      destination message storing/                                                  processing module to the                                                      multi-destination message                                                     branching circuit is                                                          released.                                                               ______________________________________                                    

Table IV describes state transition events in the file control module asviewed from the multi-destination message branching circuit as shown inFIG. 10 and is as follows.

    ______________________________________                                                           Event Originator                                                                              Other than                                 Event                    Branching branching                                  Number Events            circuit   circuit                                    ______________________________________                                        10-1   Completion of message trans-                                                                    O                                                           fer from multi-destination                                                    message branching circuit                                                     to file control module.                                                10-2   Start of message transfer                                                                       O                                                           from multi-destination                                                        message branching circuit                                                     to file control module.                                                10-3   Start of message transfer   O                                                 from file control module                                                      to multi-destination                                                          message branching circuit.                                             10-4   Completion of message trans-                                                                              O                                                 fer from file control module                                                  to multi-destination message                                                  branching circuit.                                                     10-5   Completion of message trans-                                                                    O                                                           fer from multi-destination                                                    message branching circuit                                                     to file control module.                                                10-6   Start of message transfer                                                                       O                                                           from multi-destination                                                        message branching circuit                                                     to file control module.                                                10-7   Completion of message trans-                                                                              O                                                 fer from file control module                                                  to multi-destination message                                                  branching circuit.                                                     10-8   Start of message transfer   O                                                 from file control module to                                                   multi-destination message                                                     branching circuit.                                                     10-9   Simultaneous completion of                                                                      O         O                                                 mutual transfer of messages                                                   between multi-destination                                                     message branching circuit                                                     and file control module.                                                10-10 Simultaneous start of mutual                                                                    O         O                                                 transfer of messages between                                                  multi-destination message                                                     branching circuit and file                                                    control module.                                                        ______________________________________                                    

Table V describes state transition events in the multi-destinationmessage branching circuit as viewed from the file control module asshown in FIG. 11 and is as follows.

    ______________________________________                                                            Event Originator                                                                            Other than                                  Event                     File    file                                        Number Events             control control                                     ______________________________________                                        11-1   Completion of message transfer                                                                           O                                                  from multi-destination message                                                branching circuit to file                                                     control module.                                                        11-2   Start of message transfer from                                                                           O                                                  multi-destination message                                                     branching circuit to file                                                     control module.                                                        11-3   Start of message transfer from                                                                   O                                                          file control to multi-destina-                                                tion message branching circuit.                                        11-4   Completion of message transfer                                                                   O                                                          from file control to multi-                                                   destination message branching                                                 circuit.                                                               11-5   Completion of message transfer                                                                   O                                                          from file control to multi-                                                   destination message branching                                                 circuit.                                                               11-6   Start of message transfer from                                                                   O                                                          file control module to multi-                                                 destination message branching                                                 circuit.                                                               11-7   Simultaneous completion of                                                                       O       O                                                  mutual transfer of messages                                                   between multi-destination                                                     message branching circuit and                                                 file control module.                                                   11-8   Simultaneous start of mutual                                                                     O       O                                                  transfer of messages between                                                  multi-destination message                                                     branching circuit and file                                                    control module.                                                        11-9   Completion of message tranfer                                                                            O                                                  from multi-destination message                                                branching circuit to file                                                     control module.                                                         11-10 Start of message transfer from                                                                           O                                                  multi-destination message                                                     branching circuit to file                                                     control module.                                                        ______________________________________                                    

Table VI describes state transition events in the subscriber circuit asviewed from the multi-destination message branching circuit as shown inFIG. 12 and is as follows.

    ______________________________________                                                           Event Originator                                           Event                              Other than                                 Num-                     Branching branching                                  ber   Events             circuit   circuit                                    ______________________________________                                        12-1  Troubles in subscriber system                                                                              O                                                or power turn-off.                                                      12-2  Recovery of subscriber system                                                                              O                                                from troubles or power                                                        turn-on.                                                                ______________________________________                                    

FIG. 13 illustrates another embodiment of the multi-destination messagetemporary storage 44 shown in FIG. 5. A multi-destination messagetemporary storage 44A in FIG. 13 is a RAM and has a multi-destinationmessage temporary storage area 441 comprised of a plurality of areas441A, 441B, 441C, . . . 441i and a plurality of single destinationdelivery message storage areas 442A, 442B, . . . 442i provided incorrespondence to the multi-destination message temporary storage areas441A, 441B, . . . 441i. The RAM 44A operates similarly to the RAM 44explained with reference to FIGS. 5 and 8.

The capacity of multi-destination message reception can be increasedusing the RAM 44A as shown in FIG. 13 and hence the occurrence of thereception inhibition is less frequent to promote services offered to thesubscriber.

As has been described, according to the present invention, amulti-destination message from the telephone subscriber line or trunkline can be once absorbed by the multi-destination message temporarystorage and after expansion of the multi-destination message, expandedindividual single destination delivery messages can be processed messageby message at the file control module, thereby preventing the filecontrol module from being applied with an excessive load in the form ofexpanded individual single destination delivery messages whose numberexceeds the upper limit of the number of messages that can be processedby the file control module. This makes it possible to eliminateoperational congestion in the file control module otherwise caused bythe load of the expanded individual single destination delivery messagesat any time in course of processing of messages from a plurality ofpacket terminals and to exclude the disconnection instruction from beingproduced to the subscriber lines by the occurrence of operationalcongestion. Accordingly, interference between packet terminals due to abottleneck in node performance during expansion of multi-destinationmessages can be eliminated completely.

I claim:
 1. An apparatus for multi-destination communication processingin a packet storage/exchange node comprising:a line control module forcontrolling transmission and reception of a message containing either asingle destination message or a multi-destination message to and from atelephone line; a file storage for storing said message in accordancewith delivery destination addresses; a file control module forcontrolling writing said message received from said line control moduleinto said file storage and reading said message from said file storageto supply said message to said line control module; and amulti-destination message storing/processing module including amulti-destination message temporary storage having at least onemulti-destination message temporary storage area for temporarily storingsaid multi-destination message and at least one single destinationmessage storage area for storing individual single destination messagesexpanded from said multi-destination message.
 2. A multi-destinationcommunication processing apparatus according to claim 1 wherein saidline control module includes at least one multi-destination messagebranching circuit, said multi-destination message branching circuitcomprising:means for detecting whether said message is a singledestination message or a multi-destination message; means fortransferring said message to said file control module when said meansfor detecting determines that said message is a single destinationmessage; and means for transferring said message to saidmulti-destination message storing/processing module when said means fordetecting determines that said message is a multi-destination message.3. A multi-destination communication processing apparatus according toclaim 1 wherein said multi-destination message storing/processing modulefurther comprises a central processing unit (CPU), a read only memory(ROM) and an interface.
 4. A multi-destination communication processingapparatus according to claim 2 wherein said multi-destination messagebranching circuit transmits to said telephone line a disconnectioninstruction signal or an affirmation waiting response signal when saidmulti-destination message is received.
 5. A method for multi-destinationcommunication processing in a packet storage/exchange node comprisingthe steps of:controlling transmission and reception of a messagecontaining either a single destination message or a multi-destinationmessage to and from a telephone line by means of a line control module;storing said message in accordance with delivery destination addressesby means of a file storage; writing said message received from said linecontrol module into said file storage; reading said message from saidfile storage to supply said message to said line control module;temporarily storing said multi-destination message supplied from saidline control module; expanding said temporarily stored multi-destinationmessage in accordance with single destination deliveries and storingexpanded individual single destination messages in a single destinationmessage storage area.
 6. A multi-destination communication processingmethod according to claim 5 further comprising the steps of:deciding atsaid line control module whether said message is a single destinationmessage or a multi-destination message; transferring said singledestination message to said file storage; and transferring saidmulti-destination message to means for temporarily storing saidmulti-destination message.
 7. A multi-destination communicationprocessing method according to claim 6 further comprising the step oftransmitting to said telephone line a disconnection instruction signalor an affirmation waiting response signal when said multi-destinationmessage is received and processed.